AppliedMicro Pushes Toward the Edge
AppliedMicro is better known as a metro and core company. It's already talked about moving further to the network edge, and the $32 million Tpack deal, announced yesterday and expected to close this month, could speed up that process.
That's because Tpack's products are software. The company creates chip designs that are then implemented in a Field Programmable Gate Array (FPGA) from Altera Corp. (Nasdaq: ALTR). Such an FPGA can be cranked out faster than an Application-Specific Standard Product (ASSP) can.
"It secures our right to play at the edge as these design sockets become available for these high-density, low-power edge devices," CEO Paramesh Gopi said on the call.
The flexibility of FPGAs would also provide a hedge against changes in OTN standards or conventions. Gopi noted that OTN's packet-related features, such as provisioning or rate-shaping, haven't been fully nailed down yet. Even if they're standardized, vendor implementations aren't yet interoperable, and getting to a point of comfort is going to take a while. "In the Sonet world and the IP world, something like this took eight to 10 years," he said.
Tpack has been around seemingly forever, working on chips like Sonet/SDH framers and mappers. Lately its attention has been on OTN chips, and officials have even talked about 100-Gbit/s packet processors. (See Tpack Raises $3.5M and 100G Watch: Components Wanted.)
AppliedMicro's competition in OTN includes Cortina Systems Inc. , PMC-Sierra Inc. (Nasdaq: PMCS), and even Broadcom Corp. (Nasdaq: BRCM), which announced OTN physical-layer chips at OFC/NFOEC in March. (See Cortina Builds off Acquisitions, PMC-Sierra Extends OTN, and New Product Recap: March 2010.)
— Craig Matsumoto, West Coast Editor, Light Reading