Comms chips

100G Watch: Juniper Makes a Deal

Even after OFC/NFOEC, there's some 100Gbit/s optical news to recap on the chip front. We start with a surprise acquisition.

  • Remember how Juniper Networks Inc. (NYSE: JNPR) had built up its own optical team? Turns out the company is supplementing that with coherent 100Gbit/s help from Opnext Inc. (Nasdaq: OPXT).

    The companies snuck that one past us last month. Lightwave discovered it during OFC/NFOEC, and the details are in Opnext's latest 10-Q filing with the Securities and Exchange Commission (SEC) .

    In a US$26 million deal, Juniper acquired some intellectual property from Opnext and is licensing it back to Opnext royalty-free. The nature of the intellectual property isn't spelled out in the 10-Q, but Lightwave says it's related to 100Gbit/s ASICs.

    (UPDATE: According to a clarification published March 24, Juniper didn't acquire intellectual property. It just bought an IP core -- a chip design that's usable inside bigger chips. Opnext still holds the patents and wouldn't have to license anything back.)

    That casts an interesting light on Juniper's bulked-up optical team, which Light Reading reported in October. Development of a 100Gbit/s ASIC was presumably part of that effort, but this deal lets Juniper fast-forward through that development. (See Juniper Amasses 100G Optical Team.) Opnext told Light Reading about its 100Gbit/s ASIC work last year, noting that the design had been in progress at StrataLight when it was acquired. (See Opnext Makes Its 100G Move and Opnext Steps Up With StrataLight.)

  • Cortina Systems Inc. expects to start sampling 100Gbit/s chips around August, Vice President of Marketing Arun Zarabi tells Light Reading.

    That's about four weeks adrift from Cortina's original schedule but still would make Cortina the first on the market with an integrated 100Gbit/s transponder chip, he says.

    The chip needed tweaking due to changes that came in from requests for proposals (RFPs), Zarabi says. Interestingly, one catalyst for that chain reaction was the whole MPLS-TP controversy, where the ITU-T recently opened a second option for Carrier Ethernet operations, administration and maintenance. (See MPLS Argument Leads to Split Standard.)

    The chip we're talking about here incorporates a framer and hard-decision forward error correction (FEC). It's not the same as the digital signal processor and analog-to-digital converter that are also required for coherent detection.

  • In case you missed it, Heavy Reading analyst Sterling Perrin took a moment during OFC/NFOEC to talk 100Gbit/s.

    ... and you can find more of our OFC/NFOEC video blitz links below, which recap the show's 100Gbit/s news. You can also find Light Reading's full OFC/NFOEC coverage at http://www.lightreading.com/search.asp?topic=1237.

    — Craig Matsumoto, West Coast Editor, Light Reading

  • Pete Baldwin 12/5/2012 | 5:10:09 PM
    re: 100G Watch: Juniper Makes a Deal

    >Generous take. Most folks would have said: "what I was led to believe and reported was actually not true"

    <div>Eh, not sure I agree. Most folks would have said something more like, "They couldn't finish it and decided it would be expeditious just to buy something."</div>
    Bob Saccamano 12/5/2012 | 5:10:09 PM
    re: 100G Watch: Juniper Makes a Deal Generous take. Most folks would have said: "what I was led to believe and reported was actually not true"
    Sign In