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Fujitsu Microelectronics intros chip-size module with advanced system-in-package technology for mobile systems and consumer electronics
July 16, 2002
SAN JOSE, Calif. -- SEMICON West -- Fujitsu Microelectronics America, Inc. (FMA) today introduced its new CS Module(TM), the industry's first Chip-Size Module with system-in-package technology that can shrink a multi-chip package to the size of its largest chip. The CS Module combines advances in wafer-thinning technology, which reduces the thickness of existing chips to about 16 percent of the original size, with chip stacking and re-distribution technologies. "The board area and profile of the CS Module are just two-thirds the size of competing products with similar capabilities," said Dennis Stephenson, director of FMA's Advanced Packaging Services Group. "It is the best solution for miniaturized digital equipment." The CS Module will be displayed at FMA's booth (number 9516) at SEMICON West, July 17-19 in San Jose. Conventional system IC design uses system-on-chip (SOC) methodology, which integrates multiple functions on a chip. The system-in-package (SiP) approach, which allows separate die wafers to be stacked on the substrate, uses existing package assembly techniques to reduce development lead times and costs. Fujitsu's packaging technology reduces the size of conventional SiPs by fabricating thin-profile chips. The technology stacks the chips into two layers and re-distributes signal circuitry between them. Leveraging these core technologies enabled Fujitsu to design a system prototype combining logic and memory functions, a key capability for high-end applications. Fujitsu Microelectronics America Inc.
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