3DSP Unveils PHY Processor

UniPHY, an IP core optimized for universal physical layer signal processing at speeds between 400 MHz and 1 GHz

October 19, 2001

1 Min Read

IRVINE, Calif. -- 3DSP Corporation(TM), the leader in configurable digital signal processor (DSP) architectures, today unveiled UniPHY(TM), the first IP core highly optimized for universal physical layer signal processing (PLSP) in broadband communications. The UniPHY core's custom instructions and architectural features are specifically tuned towards PLSP applications -- including Wireless LAN (802.11a, 802.11b, HiLAN2), and xDSL. With the flexibility to program a multiple-standard PHY solution on the same processor, UniPHY's low power design and application specific optimizations ensure efficient power consumption. Capable of execution speeds between 400 MHz and 1 GHz, the UniPHY processor combines an accelerated version of 3DSP's super-scalar SIMD (SuperSIMD(R)) architecture and SP-X(TM) instruction set with a new expansion instruction mode. Expansion instructions unleash the processor's full computational power by allowing simultaneous use of all 12 of its functional units. This combination allows UniPHY to provide efficient code size along with the raw processing power required to perform critical broadband communications algorithms. "We developed UniPHY specifically to meet the ever-evolving PHY layer standards for multiple broadband communication protocols," said HD Boesch, vice president of marketing at 3DSP. "In essence, UniPHY resolves the challenge of interoperability and multiple standards that system integrators constantly face." 3DSP Corp.

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