Comms chips

Bay Joins the Big Leagues

Bay Microsystems Inc. is about to join the network processor elite -- a handful of companies that can actually claim to be shipping silicon designed to process packets at 10-Gbit/s data rates.

The other two vendors that say they're shipping 10-gig processors are Applied Micro Circuits Corp. (AMCC) (Nasdaq: AMCC) and startup Terago Communications Inc. (see AMCC Ships 10-Gbit/s Processor and Terago Springs a Surprise).

Bay got silicon back from the foundry around March 25, according to its senior VP of sales and marketing Chuck Gershman. Since then, it has run a full suite of functional tests on the chip, he says, and is shipping the first samples today, Friday. It plans to announce this on Monday (15 April).

Note that doing "functional tests" is not the same as running applications on the chip. "First you have to characterize what you have, so that if an anomaly occurs, it's easy to debug it," Gershman explains. " So we went through all the resources in the chip, to see that each one responds appropriately. We are ready to start application testing immediately."

Bay didn't give the name of the customer receiving these early samples. But separately, it will reveal that Village Networks Inc. has committed to using the product, dubbed Montego (a reference to Montego Bay in Jamaica, not the Austin Montego, an ugly old rust box of a 1980s UK car.)

With this news, Bay gains a first-mover advantage over other vendors in the same space. But will that be enough? So asks RHK Inc. analyst Russell Johnson.

Bay can be commended for sticking to its product schedule, he says, unlike many others that have slipped behind (see PMC-Sierra Pulls Packet Silicon). But the marketplace remains very crowded nonetheless.

Although only two vendors are shipping products now, it's likely that several more will be ready to go soon, including EZchip Technologies and Xelerated AB (see 10-Gig Processors Shape Up). Furthermore, Intel Corp. (Nasdaq: INTC), which is taking an aggressive stance on network processors, is expected to dominate when it enters the market later this year (see Intel: The Prince of Processors?).

"The big guys will win the game," says Russell. In his view, that leaves all the startups in a supporting role -- they will only survive if they can find a niche to play in. "There's nothing specifically wrong with [Bay]. But is its product really different from others? When its time-to-market advantage is eroded, then what has it got?"

Bay counters that the importance of being first to market shouldn't be underestimated. "There's a lot of hype about the large number of vendors coming to the market," says Gershman. "But we've seen a lot of them back off, hiding behind the fact that the market isn't ready. Probably the real reason is that they are struggling to make it work."

And, naturally, Bay claims that its product is good enough to compete with the established players.

Compared to AMCC, Bay claims to perform better both in terms of chip real estate and electrical power consumption. A full-duplex 10-Gbit/s solution requires six chips from AMCC, but only two from Bay, according to Gershman. Bay keeps the chip count down, he says, because its chip is designed to perform traffic management as well as classification and policing. Many other vendors, including AMCC, share those functions over two chips.

Bay also makes a big deal out of the fact that its architecture is deterministic, meaning that the length of time it takes to process each packet can be predicted. This is an important factor in being able to guarantee packet processing at full line rate, it claims.

"The key thing is that we should be evaluated," says Gershman. "We need to overcome the incumbents' status, and get our toe in the door." This is happening, he contends -- a small footprint and low power consumption are compelling enough advantages to get the startup past this first hurdle.

Indeed, Gershman claims that Bay has signed customers that evaluated its chip alongside AMCC's. It claims to have signed six in total, as well as 12 "handshake" agreements, a mutual understanding that if the chip performs as advertised, then the vendor will be keen to deploy it.

Things might get more interesting for Bay when Swedish network processor startup Xelerated pops up on the scene. Xelerated is due to "tape out" -- get its final design to the foundry -- this month, according to RHK's Johnson.

Xelerated is probably Bay's closest competitor in terms of the chip concept -- both companies use what's called a pipelined architecture, which is what provides the deterministic performance (see Swedes Claim Processor Advance). Gershman has his own take on the comparison: "We're not like Xelerated. They are like us, because we thought of it first." The key point about Xelerated, however, is that it is targeting throughputs twice as fast as Bay.

Bay recently closed a $17 million second round of funding, led by Thomas Weisel Venture Partners. Selby Venture Partners, Alliance Ventures, and Needham Capital also participated. It has raised $26 million to date.

— Pauline Rigby, Senior Editor, Light Reading
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CaboSanLucasBoy 12/4/2012 | 10:37:12 PM
re: Bay Joins the Big Leagues Sounds like lots of hype to me. When we used Intel's last generation (the IXP1200) we never achieved the specified performance. Also every time we turned on a feature we ended up sacrificing performance at a pretty steep cost. I am very interested in, at least, giving Bay the benefit of the doubt until they're proven wrong. I'll keep you posted.

Who are these 18 customers they talk about? What do they have to say?

edgecore 12/4/2012 | 10:37:12 PM
re: Bay Joins the Big Leagues What are the 6 chips required to do full duplex 10Gbps with AMCC?

Pauline Rigby 12/4/2012 | 10:37:11 PM
re: Bay Joins the Big Leagues edgecore asked: What are the 6 chips required to do full duplex 10Gbps with AMCC?

Well, the nP7510 is the network processor, then it appears that the traffic manager is actually a two chip set. This is what it says in one of AMCC's press releases:

"The nPX5700 solution consists of the nPX5710 control logic chip (responsible for admission control, scheduling and queuing functions), packaged in a 601-pin PBGA, and the nPX5720 buffering chip (responsible for the management of payload memory), packaged in a 1125-pin PBGA."

If both NPU and TM are half-duplex, then that would make six chips.

I'm making assumptions here, so if any one knows better, then please jump in and correct me.

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edgecore 12/4/2012 | 10:37:10 PM
re: Bay Joins the Big Leagues Thanks Pauline

Then I guess if we throw in an external flow classifier somewhere in there we can get that 6 chip up to 8 or 9!

To Cabo, forget the IXP1200, the 2400 and 2800 are a step in the right direction, XScale based
and 8 micro engines at 700 Mhz for the 2400 and an impressive 1.4 Ghz on all 16 of the 2800's microengines.

My biggest beef is that NPU vendors seem to claim more design wins than the market has companies building equipment...strange math!

pablo 12/4/2012 | 10:37:08 PM
re: Bay Joins the Big Leagues
6 chips is accurate for the entire subsystem: 2 NPUs per se, plus 4 traffic management devices are required. Throwing in the CAM is somewhat unfair, as quite a few other NPU vendors would need that, too. AMCC's proprietary interfaces lead to additional glue logic being required towards framer or switch fabric - but again, at this stage glue logic is not that uncommon to other solutions, either.

If companies like Terago, Bay or (sometime later) Intel or so can really do everything with just 2 devices, it is indeed impressive and a big step forward.

My understanding is Xelerated needs a traffic management subsystem on top of the network processor, so I am not quite sure if they truly share as many architectural similarities with Bay as implied.

Lots to look forward to in the merchant silicon market this year, with some luck it'll be the first encouraging news in a while in our industry.
CaboSanLucasBoy 12/4/2012 | 10:37:07 PM
re: Bay Joins the Big Leagues Pablo,

I "think" Terago also needs a single traffic manager for every two NPs. Making it at least 3 devices to Bay's two. Sounds like you're much in the know - it this correct?

Harley 12/4/2012 | 10:37:03 PM
re: Bay Joins the Big Leagues This is poor journalism...How can Bay claim Village as a customer when they completely closed shop???

I am an ex-employee of VNI, trust me, they are done. That being said, how can Village be using the Bay chip?

Check the facts!!!!
EdgeRelief 12/4/2012 | 10:37:02 PM
re: Bay Joins the Big Leagues
Harley, good point about Village.

Looks like some people are missing their facts here. I saw Fastchip's PolicyEdge processor running a real application, Transparent LAN services, at 10 Gbps during the 2001 NPC show in San Jose. They were demonstrating TCP/IP over Ethernet with VLAN over MPLS over SONET/PPP at 25 MPPS. That would beat out all these other vendors.

It looked like a real NPU to me, ala AMCC & Terago, without traffic management and deterministic like Bay's. Fastchip claims a two chip solution for full duplex OC192 plus traffic management and do not need any external chips like CAM or SRAM, for many applications.

As for programmable NPUs at 1.4 Ghz, sounds like a heater to me. At least Bay and Fastchip have architectures that run at reasonable clock rates.

pablo 12/4/2012 | 10:37:00 PM
re: Bay Joins the Big Leagues > I "think" Terago also needs a single traffic
> manager for every two NPs.

You're right, the need for a TM has been published. I went back to the "Terago springs a surprise" article and appreciate the correction.

> Making it at least 3
> devices to Bay's two. Sounds like you're much
> in the know - it this correct?

I wouldn't say "much" - some vested outside interest in the NPU market I'll admit to. Direct involvement in it I can very honestly deny, though.
Pauline Rigby 12/4/2012 | 10:36:57 PM
re: Bay Joins the Big Leagues I agree, good point about Village. We even ran a story on it recently:

Startup Trouble: Curse of the 'V'

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