SANTA CLARA, Calif. -- Applied Materials, Inc. (Nasdaq:AMAT) today introduces the DPN (Decoupled Plasma Nitridation) chamber, a critical process technology that enables the fabrication of transistor gate dielectric structures in next-generation chips. The single-wafer DPN process incorporates a high concentration of nitrogen into the surface of an ultra-thin gate oxide to prevent boron penetration and reduce leakage current, resulting in repeatable and reliable transistors for 130nm and below device designs. "The DPN solves several key technical challenges, enabling chipmakers to extend their use of silicon dioxide for gate dielectric applications beyond the 100nm device generation," said Paul Meissner, vice president and general manager of Applied Materials' Thermal Systems and Modules Business Group. "We already have over a dozen DPN chambers in use for production, as well as in 100nm-generation gate development at some of our most advanced customers' fabs throughout the world. The versatility of this process, which can be easily integrated on a single cluster tool platform with our other single-wafer gate fabrication technologies, makes it very attractive for extending transistor fabrication for the next several device generations." Applied Materials Inc.