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Agere Gets Mapper-Happy

Having jettisoned optical components in favor of optical communications chips, what Agere Systems (NYSE: AGR/A) really needs right now is some pioneering -- and lucrative -- new products in silicon. But its product announcement today may have left many wanting more (see Agere Launches New Mappers).

Hypermapper, as the new product is called, is billed as Agere's fourth generation of mappers for access equipment. It bridges the worlds of plesiochronous digital hierarchy (PDH) and Sonet (Synchronous Optical NETwork) and SDH (Synchronous Digital Hierarchy), by aggregating a range of slower channels used to carry voice and data in traditional telephone networks onto the transport backbone. On the access side, Hypermapper can aggregate a variety of channels from tiny DS0 (64 kbit/s) pipes to larger DS3s (45 Mbit/s).

Hypermapper's main claim to fame is that it handles one OC12 (622 Mbit/s) worth of traffic -- four times the density of the previous product generation, and of the nearest competing product from PMC-Sierra Inc. (Nasdaq: PMCS).

But take a peek under the covers, and it turns out that little has changed from Agere's previous product, Ultramapper. In fact, the initial release of Hypermapper will be a multichip module -- basically four Ultramapper chips combined in a single package. In other words, Agere hasn't had to redesign the chip at all; it's simply used a more advanced packaging technology to shrink things down.

While multichip modules such as Hypermapper score on the density front, they don't offer any improvements on power consumption -- the other key area of concern in central offices. "You've still got all the IO, which is where most of the power goes," says Simon Stanley, president of technical consultancy Earlswood Marketing Ltd.

It's a complicated chip, with a range of features including a Sonet crossconnect, and pointer processing for add/drop capabilities, making the product applicable to most, if not all, aggregation applications that equipment providers might want to provide to telecommunications service providers. Agere doesn't expect any one customer to use all of the features in the same platform; instead, customers can develop a range of platforms quickly, using the same product, once they have mastered their understanding of the chip.

PMC-Sierra's product, called the TEMUX-84, has been shipping since 2001. In density, it's equivalent to Agere's previous product, Ultramapper, with an OC3 (155 Mbit/s) worth of throughput. Agere also claims that TEMUX has a more limited set of features. PMC-Sierra could not find anyone to comment before press time.

Agere's press release talks about a single-chip version of the Hypermapper product implemented in 0.14 micron CMOS technology, though it's not clear when this would be released. "We don't have a definite schedule, but it could take up to a year," says Tom Hickey, Agere's director of product marketing for the access and transport group.

In what is clearly another sign of the times, Hickey says the development costs for a device like Hypermapper are so high -- possibly as much as $10 million over two years -- that an interim product was felt to be worthwhile. "We're trying to meet the requirements while spending as little money as possible," he says.

The interim design gives the company a breathing space of maybe as much as a couple of years, Hickey suggests. It will be a while before customers start demanding greater density and new features.

But Earlswood's Stanley isn't convinced this is the whole answer. "Multichip modules are short-term transitory products because basically they cost an arm and a leg," he says. Costs are multiplied because each package contains multiple chips. One explanation may be that Agere committed to a higher-density product with a customer but couldn't commit the resources to develop it.

Agere does say that it's actively working on the single-chip version of Hypermapper -- but the design is still at early stages and has yet to be finalized. "The device we have now exceeds most market applications," says Hickey, "So it's not a good time to kick up an incremental design."

The initial release of Hypermapper will cost $1,500 in quantities of 1,000. It will have a baby brother chip, HypermapperLite, which doesn't have DS0 capabilities, priced at $900. Samples of both products are expected to ship in February 2003.

— Pauline Rigby, Senior Editor, Light Reading
aardvark 12/5/2012 | 12:55:05 AM
re: Agere Gets Mapper-Happy I thought the EVROS was the first fully channelised OC12 device?

Is AMCC sampling the device or was it a pre-announcement?

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